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Support of AMBA AXI and AMBA AHB interfaces |
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Read and write FIFOs with configurable length |
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Configurable master system and memory bus width |
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Reordering function for maximum bandwidth |
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Supports DDR1, DDR2, FCRAM, RLDRAM memories |
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Fully programmable DRAM parameters |
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Dynamically reconfigurable memory burst length |
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Fully software based memory initialization and configuration |
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Built in self test |
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ECC - optional |
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